Architectural Design of a Fast Search Algorithm and Implementation to Intra-Mode Decision Block of Still Image Coding

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dc.authoridAkman, Ali/0000-0002-9486-519Xen_US
dc.contributor.authorÇekli, Serap
dc.contributor.authorAkman, Ali
dc.date.accessioned2024-07-12T21:37:17Z
dc.date.available2024-07-12T21:37:17Z
dc.date.issued2022en_US
dc.department[Belirlenecek]en_US
dc.description.abstractAs a requirement of many modern image compression standards faced today, a computational complexity is observed due to the best mode selection in the intra-prediction stage. This computational complexity is tried to be reduced by various techniques without affecting the performance criteria of the image. In this study, a fast search algorithm, which simplifies the mode selection process of the intra-prediction algorithm and provides calculation with less number of modes is proposed. The hardware architecture of this proposed algorithm is implemented for realization. There are two main sections of the intra-prediction algorithm in image compression, namely the image prediction process and the mode selection process. In this study, main objective is to reduce the process time of the mode selection and the simplification of the hardware design. Sum of absolute difference (SAD) is a frequently used criterion to simplify hardware design. The algorithm searches for the most suitable mode in a single step, where the decision is based on the SAD criterion preferred for the simplicity. The proposed algorithm and related hardware architecture is tested by using various experiments. The number of the modes calculated is reduced effectively, while the process is kept within the acceptable limits in terms of peak signal to noise ratio (PSNR) and compression rate (CR) performance criteria. Therefore, the number of clock cycles observed is considerably reduced. The designed architecture is synthesized for the field programmable gate arrays (FPGA) board and the obtained results are given. In addition, these results are compared with the HM reference software where the corresponding results are in accordance with the reference software.en_US
dc.description.sponsorshipScientic and Technological Research Council of Turkey (TUBITAK) [118E822]en_US
dc.description.sponsorshipThis research was supported by the Scientic and Technological Research Council of Turkey (TUBITAK) under project No. 118E822.en_US
dc.identifier.doi10.1142/S0218126622501481
dc.identifier.issn0218-1266
dc.identifier.issn1793-6454
dc.identifier.issue8en_US
dc.identifier.scopus2-s2.0-85124738104en_US
dc.identifier.scopusqualityQ3en_US
dc.identifier.urihttps://doi.org/10.1142/S0218126622501481
dc.identifier.urihttps://hdl.handle.net/20.500.12415/6728
dc.identifier.volume31en_US
dc.identifier.wosWOS:000790860100014en_US
dc.identifier.wosqualityQ4en_US
dc.indekslendigikaynakWeb of Science
dc.indekslendigikaynakScopus
dc.language.isoenen_US
dc.publisherWorld Scientific Publ Co Pte Ltden_US
dc.relation.ispartofJournal of Circuits Systems And Computersen_US
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.snmzKY04070
dc.subjectIntra-Predictionen_US
dc.subjectStill Image Codingen_US
dc.subjectSaden_US
dc.subjectMode Selection Architectureen_US
dc.titleArchitectural Design of a Fast Search Algorithm and Implementation to Intra-Mode Decision Block of Still Image Codingen_US
dc.typeArticle
dspace.entity.typePublication

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